 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| www..com (R) EMIF10-COM01F2 EMI FILTER INCLUDING ESD PROTECTION IPADTM MAIN PRODUCT CHARACTERISTICS EMI filtering and ESD protection for: Computers and printers Communication systems Mobile phones DESCRIPTION The EMIF10-COM01F2 is a highly integrated device designed to suppress EMI / RFI noise in all systems subjected to electromagnetic interferences. The EMIF10 Flip-Chip packaging means the package size is equal to the die size. Additionally, this filter includes an ESD protection circuitry which prevents the protected device from destruction when subjected to ESD surges up to 15 kV. BENEFITS EMI symmetrical (I/O) low-pass filter Lead free package 2 Very low PCB space consuming: < 6mm Very thin package: 0.65 mm High efficiency in ESD suppression on both input & output pins High reliability offered by monolithic integration COMPLIES WITH THE FOLLOWING STANDARDS: IEC61000-4-2 level 4 15kV (air discharge) 8kV (contact discharge) Flip-Chip (25 Bumps) Table 1: Order Code Part Number EMIF010-COM01F2 Marking FE Figure 1: Pin Configuration (Ball side) E I5 D I4 C I3 B I2 A I1 1 2 3 4 5 I10 I9 I8 I7 I6 GND GND GND GND GND 010 09 08 07 06 05 04 03 02 01 Figure 2: Basic cell configuration Low-pass Filter Input Output RI/O = 200 Cline = 45 pF TM: IPAD is a trademark of STMicroelectronics. April 2005 REV. 2 1/7 www..com EMIF10-COM01F2 Table 2: Absolute Ratings (Tamb = 25C) Symbol VPP Tj Top Tstg Parameter and test conditions ESD discharge IEC61000-4-2, air discharge ESD discharge IEC61000-4-2, contact discharge Junction temperature Operating temperature range Storage temperature range Value 15 8 125 - 40 to + 85 - 55 to + 150 Unit kV C C C Table 3: Electrical Characteristics (Tamb = 25C) Symbol VBR IRM VRM VCL Rd IPP RI/O Cline Symbol VBR IRM Rd RI/O Cline tLH At 0V bias Vinput = 2.8V Rload = 100k IR = 1 mA VRM = 3V per line IPP = 10A, tp = 2.5s 180 1 200 45 220 50 25 Parameter Breakdown voltage Leakage current @ VRM Stand-off voltage Clamping voltage Dynamic impedance Peak pulse current Series resistance between Input & Output Input capacitance per line slope : 1 / R d VCL VBR VRM IRM IR I V IPP Test conditions Min. 6 Typ. 8 Max. 10 500 Unit V nA pF ns 2/7 www..com EMIF10-COM01F2 Figure 3: S21(db) attenuation measurement EMIF10-COM01F2: Typical S21(dB) measurement on line I10/O10 0.00 dB -5.00 -10.00 -30.00 Figure 4: Analog crosstalk 0.00 dB -10.00 -20.00 -15.00 -40.00 -20.00 -25.00 -30.00 -35.00 -40.00 -45.00 -50.00 1.0M 3.0M 10.0M 30.0M 100.0M 300.0M f/Hz 1.0G 3.0G -50.00 -60.00 -70.00 -80.00 -90.00 -100.00 100.0k 1.0M 10.0M f/Hz 100.0M 1.0G Note: Spikes at high frequencies are induced by the PCB layout Figure 5: ESD response to IEC61000-4-2 (+15kV air discharge) on one input V(in) and on one output (Vout) Figure 6: ESD response to IEC61000-4-2 (-15kV air discharge) on one input V(in) and on one output (Vout) V(in1) V(in1) V(out1) V(out1) Figure 7: Rise time measurement EMIF10-COM01F2 In Out Vout Square signal Generator Vc = 2.8V Vin 100k Vout Vin 3/7 www..com EMIF10-COM01F2 Figure 8: Capacitance versus reverse applied voltage C(pF) 50 F=1MHz Vosc=30mV 40 30 20 10 0 1 2 VR(V) 3 4 5 Figure 9: Aplac model 200R in MODEL = demif10 out MODEL = demif10 Demif10 model BV = 7 IBV = 1m CJO = 25p M = 0.3333 RS = 1 VJ = 0.6 TT = 100n sub PCB grounding recommendations In order to ensure a good efficiency in terms of ESD protection and filtering behavior, we recommend to implement microvias (100 m dia.) between the GND bumps and the GND layer. GND bumps can be connected together in PCB layer 1, and in addition, if possible, use through hole vias (200 m dia.) in both sides of filter to improve contact to GND (layer). This layout will minimize the distance to the ground and thus parasitic inductances. In addition, we recommend to have GND plane wherever possible. 4/7 www..com EMIF10-COM01F2 Figure 10: Ordering Information Scheme EMIF EMI Filter Number of lines Information x = resistance value (Ohms) z = capacitance value / 10(pF) or 3 letters = application 2 digits = version Package F = Flip-Chip x = 1: 500m, Bump = 315m = 2: Leadfree Pitch = 500m, Bump = 315m = 3: Leadfree Pitch = 400m, Bump = 250m yy - xxx zz Fx Figure 11: FLIP-CHIP Package Mechanical Data 500m 50 315m 50 650m 65 500m 50 2.42mm 50m Figure 12: Foot print recommendations Figure 13: Marking 2.42mm 50m 545 Dot, ST logo xx = marking z = packaging location yww = datecode (y = year ww = week) 400 545 Copper pad Diameter : 250m recommended , 300m max E Solder stencil opening : 330m Solder mask opening recommendation : 340m min for 315m copper pad diameter xxz y ww 100 230 All dimensions in m 5/7 www..com EMIF10-COM01F2 Figure 14: FLIP-CHIP Tape and Reel Specification Dot identifying Pin A1 location 4 +/- 0.1 O 1.5 +/- 0.1 1.75 +/- 0.1 3.5 +/- 0.1 0.73 +/- 0.05 All dimensions in mm Table 4: Ordering Information Ordering code EMIF10-COM01F2 Marking FE Package Flip-Chip Weight 8.3 mg Base qty 5000 Delivery mode Tape & reel Note: More informations are available in the application notes: AN1235: "Flip-Chip: Package description and recommendations for use" AN1751: "EMI Filters: Recommendations and measurements" 8 +/- 0.3 STE STE STE xxz yww User direction of unreeling xxz yww xxz yww 4 +/- 0.1 Table 5: Revision History Date 14-Dec-2004 12-Apr-2005 Revision 1 2 First issue. Die clearance reduction. Description of Changes 6/7 www..com EMIF10-COM01F2 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners (c) 2005 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 7/7 |
Price & Availability of EMIF010-COM01F2
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |